The present invention relates to a system for controlling a plurality of microprocessors which are employed in computerized controls of industrial machinery and facilities.
In general, data is transferred at relatively high speeds among a plurality of microprocessors by connecting data buses. However, when a direct memory access transfer (DMA transfer) is effected, it is necessary to cut off the microprocessor of a slave side. However, such an interruption of operation due to the cutting-off of the microprocessor is disadvantageous because the processing ability of the entire control system is reduced.
FIG. 1 illustrates a prior art system for controlling a plurality of microprocessors. A plurality of microprocessors 1 and 2 are connected to buses 3 and 4, respectively. It is assumed that the microprocessor 1 serves as the master and the microprocessor 2 as the slave. When it is desired to transfer information from a memory 22 on the side of the bus 3 to a memory 25 on the side of the bus 4 in the direct memory access (DMA) transfer mode, information stored in the memory 22 must be transferred to the memory 25 through a connecting bus 30 and a path "a". In this case, a portion of the bus 4 is occupied as the path "a" for transferring information, and the operation of the microprocessor 2 of the slave side is restricted. Namely, transmissions of information between a program storing unit 24 and an input/output unit 26 through the bus 4 are prevented. FIG. 2 shows these elements and their counterparts, comprising: (a) Program Memory 21, which is the counterpart for the storing unit 24 that is shown in FIG. 2 as Program Memory 24 and described on page 1 as storing unit 24; (b) I/O Device 23, whose counterpart is shown in FIG. 2 as I/O device 26 and whose counterpart is described on page 1 as input/output device 26. Therefore, the bus 4 must be disconnected from the microprocessor 2 at a connection point 41. Consequently, such a prior art system is disadvantageous, because the degree of the exclusive use of the bus 4 by the microprocessor 2 is reduced and, accordingly, the processing ability of the entire control system is reduced.